1. Field of the Invention
The present invention relates to a method for driving an LCD device, and more particularly, to a method for driving an LCD device with high display quality by suppressing the mura effect based on an interlace-commutate scanning process for sequentially enabling a plurality of sets of gate lines.
2. Description of the Prior Art
Because liquid crystal display (LCD) devices are characterized by thin appearance, low power consumption, and low radiation, LCD devices have been widely applied in various electronic products for panel displaying. In general, an LCD device comprises liquid crystal cells encapsulated between two substrates and a backlight module for providing lighting source. The operation of an LCD apparatus is featured by varying voltage drops between opposite sides of the liquid crystal cells for twisting the angles of the liquid crystal molecules of the liquid crystal cells so that the transparency of the liquid crystal cells can be controlled for illustrating images with the aid of the backlight module.
It is well known that the polarity of voltage drop across opposite sides of the liquid crystal cells should be inverted periodically for protecting the liquid crystal cells from causing permanent deterioration due to polarization, and also for reducing image sticking effect on the LCD device. In general, the LCD panel driving operations can be categorized into the frame-inversion driving operation, the line-inversion driving operation, the pixel-inversion driving operation, and the dot-inversion driving operation.
While driving an LCD device based on the frame-inversion driving operation, the polarities of data signals applied to each liquid crystal cell are inverted with respect to alternating display frames. The line-inversion driving operation comprises the column-inversion driving operation and the row-inversion driving operation. While driving an LCD device based on the column-inversion driving operation, the polarities of data signals applied to each liquid crystal cell are inverted with respect to alternating data lines. While driving an LCD device based on the row-inversion driving operation, the polarities of data signals applied to each liquid crystal cell are inverted with respect to alternating gate lines. While driving an LCD device based on the pixel-inversion driving operation, the data signals having opposite polarities are applied to adjacent pixels, and the data signals of the red, green, and blue pixel units in the same pixel have the same polarity. While driving an LCD device based on the dot-inversion driving operation, the data signals having opposite polarities are applied to adjacent pixel units. Among the aforementioned LCD panel driving operations, the pixel-inversion driving operation and the dot-inversion driving operation are well known to provide better display quality. In view of that, recently LCD panels have mainly used the pixel-inversion driving operation or the dot-inversion driving operation for displaying images.
FIG. 1 is a schematic diagram showing a prior-art LCD device based on the row-inversion driving operation. As shown in FIG. 1, the LCD device 100 comprises a plurality of data lines 160, a plurality of gate lines 150, a plurality of common lines 180, and a plurality of pixel units 170. For ease of explanation, the LCD device 100 in FIG. 1 illustrates six data lines 160, six common lines 180, and six gate lines 150 (GL1-GL6). All the common lines 180 are furnished with a common voltage Vcom. Each data line 160 is utilized for receiving one corresponding data signal. Each gate line 150 is utilized for receiving one corresponding gate signal. For instance, the first gate line GL1 is utilized for receiving the first gate signal SGL1, the sixth gate line GL6 is utilized for receiving the sixth gate signal SGL6, and the rest can be inferred by analogy. Each pixel unit 170 is a red pixel unit, a green pixel unit, or a blue pixel unit. Each pixel unit 170 comprises a data switch 171 and a storage unit 173. Each data switch 171 is turned on/off in response to one corresponding gate signal furnished by one corresponding gate line 150. Each data signal is written into one corresponding storage unit 173 via one corresponding data line 160 under the control of one corresponding data switch 171.
FIG. 2 is a schematic diagram showing pixel polarities in the Nth frame illustrated by the LCD device shown in FIG. 1. The positive polarity, represented by sign “+” in FIG. 2, means that the voltage of the corresponding data signal is positive with respect to the common voltage Vcom. The negative polarity, represented by sign “−” in FIG. 2, means that the voltage of the corresponding data signal is negative with respect to the common voltage Vcom. In the Nth frame 200 shown in FIG. 2, the data signals with positive polarity are written into the pixel units disposed in odd rows, and the data signals with negative polarity are written into the pixel units disposed in even rows. FIG. 3 shows the related signal waveforms regarding the operation of the LCD device in FIG. 1 for generating the Nth frame in FIG. 2 based on a prior-art LCD driving method, having time along the abscissa. The sign “+” in parentheses means that the polarity of the corresponding written data signal is positive, and the sign “−” in parentheses means that the polarity of the corresponding written data signal is negative. As shown in FIG. 3, the prior-art LCD driving method divides the frame time for generating the Nth frame 200 into a first interval and a second interval. During the first interval, the common voltage Vcom is set to be a low voltage, and the gate signals of odd gate lines are sequentially enabled for writing the data signals with positive polarity into odd rows of pixel units. During the second interval, the common voltage Vcom is set to be a high voltage, and the gate signals of even gate lines are sequentially enabled for writing the data signals with negative polarity into even rows of pixel units.
For instance, during the consecutive sub-intervals Td1, Td2 and Td3 within the first interval, the gate signals SGL1, SGL3 and SGL5 are sequentially enabled for writing the data signals with positive polarity sequentially into the pixel units 170 of the first, third and fifth rows via the plurality of data lines 160. During the consecutive sub-intervals Td1, Td2 and Td3 within the second interval, the gate signals SGL2, SGL4 and SGL6 are sequentially enabled for writing the data signals with negative polarity sequentially into the pixel units 170 of the second, fourth and sixth rows via the plurality of data lines 160.
However, in the aforementioned prior-art LCD driving method, each frame time is only divided into two intervals for writing the data signals with different polarities into the pixel units of the odd and even rows respectively, which results in higher deviations of data signals between adjacent rows of pixel units due to current leakages of data switches. Accordingly, the display quality of the prior-art LCD device is degraded due to the mura effect caused by the higher deviations of data signals between adjacent rows of pixel units. Furthermore, the voltage level of common voltage switches only once within each frame time, and therefore the brightness offset of pixel units becomes more serious following the drift of the common voltage. Moreover, both the enabling sequences of gate signals during the first and second intervals are incremental or decremental, which is likely to degrade display quality by causing unwanted frame brightness gradient.